//CWE-1234 Consider the example Locked_override_register example. 
/*
This register module supports a lock mode that blocks any writes after lock is set to 1.
However, it also allows override of the lock protection when scan_mode or debug_unlocked modes are active.
*/
`timescale 1ns/1ps
module Locked_register_example
(
input [15:0] Data_in,
input Clk,
input resetn,
input write,
input Lock,
input scan_mode,
input debug_unlocked,
output reg [15:0] Data_out
);

reg lock_status;

always @(posedge Clk or negedge resetn)
if (~resetn) // Register is reset resetn
begin
lock_status <= 1'b0;
end
else if (Lock)
begin
lock_status <= 1'b1;
end
else if (~Lock)
begin
lock_status <= lock_status;
end
always @(posedge Clk or negedge resetn)
if (~resetn) // Register is reset resetn
begin
Data_out <= 16'h0000;
end
else if (write & (~lock_status | scan_mode | debug_unlocked) ) // Register protected by Lock bit input, overrides supported for scan_mode & debug_unlocked
//else if (write & ~lock_status )
begin
Data_out <= Data_in;
end
else if (~write)
begin
Data_out <= Data_out;
end
initial assume(!resetn);
always @(posedge Clk) begin
    if(resetn && $past(lock_status)) begin
        assert($stable(Data_out));
    end
end
endmodule